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? semiconductor components industries, llc, 2011 november, 2011 ? rev. p0 1 publication order number: noa1312/d noa1312 product preview high-precision ambient light sensor with three i 2 c slave addresses, eeprom and dark current compensation description the noa1312 high ? precision ambient light sensor (als) is designed f or very high accuracy (better than 5% tolerance) handheld applications. the device integrates a 16 ? bit adc, a 2 ? wire i 2 c digital interface with three pin ? selectable i 2 c slave addresses, internal clock oscillator, eeprom and a power do wn mode. a photopic optical color filter together with built in dynamic dark current compensation and precision calibration capability plus excellent ir and 50/60 hz flicker rejection enables highly accurate measurements from very low light levels to full sunlight. the device can support simple count equals lux readings in interrupt ? driven or polling modes. the noa1312 employs proprietary cmos im age sensing technology from on semiconductor to provide large signal to noise ratio (snr) and wide dynamic range (dr) over the entire operating temperature range. features ? senses ambient light and provides an output count proportional to the ambient light intensity ? human eye spectral response using photopic optical filter ? dynamic dark current compensation ? very high accuracy (better than 5% tolerance) ? ev sensitivity of 5.2 counts/lux ? three i 2 c slave addresses (0x29, 0x39 and 0x49), pin selectable ? less than 240 a active power consumption in normal operation ? ultra ? low quiescent power dissipation, less than 100 na in power down mode (below 50 c) ? interrupt signal notifies host of significant intensity changes ? internal eeprom stores values to minimize programming time ? register values preserved during power ? down mode ? wide operating voltage range (2.4 v to 3.6 v) ? wide operating temperature range ( ? 40 c to 85 c) ? linear response over the full operating range ? senses intensity of ambient light from 0.096 lux to full sunlight ? programmable integration times ? no external components required ? built ? in 16 ? bit adc ? i 2 c serial communication port supports standard and fast modes ? this device is pb ? free, halogen free/bfr free, and rohs compliant this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. http://onsemi.com cudfn6 cu suffix case 505ad pin assignment ? saves display power in applications such as: ? tablets, led backlit displays, smart phones, netbooks, pdas, mp3 players, gps ? video recorders applications device package shipping ? ordering information NOA1312CUTAG cudfn6 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. (top view) vdd ad sda vss int scl 1
noa1312 http://onsemi.com 2 figure 1. typical application circuit figure 2. simplified block diagram sda scl vdd vss r1 1 k r2 1 k vin = 2.4 to 3.6 v c1 10 c2 0.1 ic1 noa1312 mcu sda scl h v int r3 1 k int 2 3 4 6 1 5 ad vdd, nc or vss c3 100 p photo diode reference diode adc sda scl int eeprom & charge pump ad c b1 c b2 c b3 c bn not to exceed 250 pf including all parasitic capacitances h v i 2 c interface & control table 1. pin function description pin pin name description 1 vss ground pin. 2 int interrupt request to the host. active ? low, open drain output and requires a 1 k pull ? up resistor. 3 scl external i 2 c clock provided by the i 2 c master. requires a 1 k pull ? up resistor. 4 sda bi ? directional data signal for communication between this device and the i 2 c master. requires a 1 k pull ? up resistor. 5 ad i 2 c slave addresses select pin. selects one of three i 2 c slave addresses (0x29, 0x39 or 0x49) depend- ing on if this pin is connected to vdd, nc (open) or vss at power up. this is not a programmable input, the connection should not be changed after power up. 6 vdd power pin. table 2. absolute maximum ratings rating symbol value unit input power supply vdd 4.0 v input voltage range v in ? 0.2 to vdd + 0.2 v output voltage range v out ? 0.2 to vdd + 0.2 v digital output current i o ? 10 to 10 ma operating free ? air temperature range t a ? 40 to 85 c storage temperature t stg ? 45 to 85 c esd capability, human body model (note 1) esd hbm 2,000 v esd capability, charged device model (note 1) esd cdm 750 (corner pins), 500 (center pins) v esd capability, machine model (note 1) esd mm 200 v moisture sensitivity level msl 5 ? lead temperature soldering (note 2) t sld 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. this device incorporates esd protection and is tested by the following methods: esd human body model tested per eia/jesd22 ? a114 esd charged device model tested per esd ? stm5.3.1 ? 1999 esd machine model tested per eia/jesd22 ? a115 latchup current maximum rating: 100 ma per jedec standard: jesd78 2. for information, please refer to our soldering and mounting techniques reference manual, solderrm/d
noa1312 http://onsemi.com 3 table 3. operating ranges rating symbol min typ max unit power supply voltage vdd 2.4 3.0 3.6 v power supply current idd 140 240 a quiescent supply current (note 3) idd qs 12 800 na low level input voltage v il ? 0.2 0.3 vdd v high level input voltage (note 4) v ih 0.7 vdd vdd + 0.2 v hysteresis of scl & sda schmitt trigger inputs (vdd > 2 v) v hys 0.05 vdd v low level output voltage (open drain) at 3 ma sink current (sda, int) v ol 0 0.4 v output low current (sda, int) i ol 3 ? ma output fall time from v ihmin to v ilmax with a bus capacitance, c b from 10 pf to 250 pf (note 4) t of ? ? 250 ns input current of io pin with an input voltage between 0.1 vdd and 0.9 vdd i i ? 10 10 a capacitance for io pin (note 4) c b 10 pf operating free ? air temperature range t a ? 40 85 c 3. current dissipation when in power down mode. 800 na power down current at 85 c (see figure 14). 4. cb = capacitance of one bus line, maximum value including all parasitic capacitances should be less than 250 pf. table 4. electrical characteristics (unless otherwise specified, these specifications apply over 2.4 v < vdd < 3.6 v, ? 40 c < t a < 85 c, 10 pf < cb < 100 pf) (note 5) parameter symbol standard mode fast mode unit min max min max scl clock frequency f scl 10 100 100 400 khz hold time after repeated start condition. after this period, the first clock pulse is generated. t hd;sta 4.0 ? 0.6 ? s low period of scl clock t low 4.7 1.3 s high period of scl clock t high 4.0 0.6 s set ? up time for repeated start condition t susta 4.7 ? 0.6 ? s sda data hold time t hddat 0 3.45 0 0.9 s sda data set ? up time t sudat 250 ? 100 ? ns rise time of both sda and scl (input signals) (note 6) t r 5 1000 20 + 0.1c b 300 ns fall time of both sda and scl (input signals) (note 6) t f 5 300 20 + 0.1c b 300 ns set ? up time for stop condition t susto 4.0 ? 0.6 ? s bus free time between stop and start condition t buf 4.7 ? 1.3 ? s capacitive load for each bus line c b ? 250 ? 250 pf noise margin at the low level for each connected device (including hysteresis) v nl 0.1 vdd ? 0.1 vdd ? v noise margin at the high level for each connected device (including hysteresis) v nh 0.2 vdd ? 0.2 vdd ? v parameter symbol typ typ unit internal oscillator frequency f osc 1 1 mhz 5. refer to figure 3 for more information on ac characteristics 6. the rise time and fall time are measured with a pull ? up resistor r p = 1 k and c b of 250 pf (including all para sitic capacitances). the maximum t f for the sda and scl bus lines (300 ns) is longer than the specified maximum t of for the output stages (250 ns). this allows series protection resistors (rs) to be connected between the sda/scl pads and the sda/scl bus lines without exceeding the maximum specified t f .
noa1312 http://onsemi.com 4 table 5. optical characteristics (unless otherwise specified, these specifications are for vdd = 3.0 v, t a = 25 c) parameter test conditions symbol min typ max unit irradiance responsivity p (see figure 4) r e 550 nm trimmed response white led light source, ev = 100 lux, tint = 200 ms (see figure 7) r v_trim 494 520 546 counts dark response ev = 0 lux, tint = 400 ms, vdd = 2.4 to 3.6 v, ? 40 c to 85 c r v_dark 0 1 counts illuminance responsivity white led light source, ev = 12,603 lux, tint = 200 ms (see figure 5, figure 6, note 7) r v_max 65,535 counts counts vs vdd ev = 100 lux, tint = 200 ms, vdd = 2.4 to 3.6 v, relative to vdd = 3.0 v dc/dvdd ? 5 5 % counts vs temperature ( ? 40 c to 0 c) ev = 100 lux, tint = 200 ms, vdd = 3.0 v, ? 40 c to 0 c, relative to room temperature (25 c) dc/dt low ? 20 20 % counts vs temperature (0 c to 85 c) ev = 100 lux, tint = 200 ms, vdd = 3.0 v, 0 c to 85 c, relative to room temperature (25 c) dc/dt high ? 5 5 % linearity (low ev) white led light source, ev = 0 ? 15 lux, tint = 200 ms l low (5.2*ev ) ? 5 (5.2*ev)+2 counts linearity (high ev) white led light source, ev = 15 ? 16,250 lux, tint = 200 ms (note 8) l high ? 5 3.5 % count stability ev = 100 lux, tint = 200 ms, vdd = 3.0 v (note 9) dc/dt ? 1 1 % trimming range ev = 100 lux, tint = 200 ms, ? 37% to +65%, vdd = 2.4 to 3.6 v, ? 40 c to 85 c (note 10) trim range 315 825 counts 7. the maximum count that can be accumulated in a 16 ? bit register is 65,535. 8. linearity (high ev) is estimated using the following formula: linearity (high ev) = ((counts(n) ? ideal_counts(n))/ ideal_counts(n)))* 100 where: n is an ev value between 0 lux and 16,250 lux ideal_counts (at any ev): 5.2 counts/lux (tint = 200 ms) linearity values shown above after the final trimming. 9. count stability is measured over a duration of 5 minutes using a stable white led at ev = 100 lux, vdd = 3.0 v, t a = 25 c 10. output counts prior to trimming: low counts = 520/1.65, high counts = 520/0.63. figure 3. ac characteristics
noa1312 http://onsemi.com 5 typical characteristics figure 4. spectral response (normalized) figure 5. light source dependency (normalized to fluorescent light, tint = 200 ms) wavelength (nm) ratio 900 800 700 600 500 400 300 200 0 10 30 40 60 70 90 100 2.0 1.5 1.0 0.5 0 figure 6. output counts vs. ev, 0 ? 2000 lux (tint = 200 ms) figure 7. output counts and trim codes (100 lux, vdd = 3.0 v, tint = 200 ms) ev (lux) trim codes 10 k 1 k 100 10 1 0.1 1 10 100 1 k 10 k 100 k 250 200 150 100 50 0 200 300 400 500 700 800 900 1000 figure 8. output counts vs. angle (end view, normalized) figure 9. output counts vs. angle (side view, normalized) output counts (normalized %) output counts output counts 1000 20 50 80 als human eye fluorescent white led incandescent fluorescent 5000 k 5600 k 2850 k 2700 k 600 trim to 520 counts at 100 lux 0 10 20 30 40 50 60 70 80 90 0 100 20 30 10 50 60 70 80 90 40 110 120 100 130 150 160 170 180 ? 170 ? 160 ? 150 140 ? 140 ? 120 ? 11 0 ? 130 ? 90 ? 80 ? 70 ? 60 ? 50 ? 100 ? 30 ? 20 ? 40 ? 10 end view 1 2 3 6 5 4 top view side view top view 1 2 3 6 5 4 0 10 20 30 40 50 60 70 80 90 0 100 20 30 40 10 60 70 80 90 100 110 50 130 120 140 160 170 180 ? 170 ? 160 150 ? 150 ? 130 ? 140 ? 11 0 ? 100 ? 90 ? 80 ? 70 ? 60 ? 120 ? 40 ? 30 ? 20 ? 50 ? 10 ? 90 90 ? 90 90
noa1312 http://onsemi.com 6 typical characteristics figure 10. output counts at 0 lux vs. temperature (tint = 400 ms) figure 11. output counts at 100 lux vs. temperature (tint = 200 ms) temperature ( c) temperature ( c) 80 60 40 20 0 ? 20 ? 40 ? 1 0 1 80 60 40 20 0 ? 20 ? 40 400 420 460 480 520 540 580 600 figure 12. output counts at 0 lux vs. supply voltage (tint = 400 ms) figure 13. output counts at 100 lux vs. supply voltage (tint = 200 ms) vdd (v) vdd (v) 4.0 3.5 3.0 2.5 2.0 0 1 2 4.0 3.5 3.0 2.5 2.0 400 440 480 520 560 600 figure 14. supply current in power down mode vs. temperature (100 lux, tint = 200 ms) figure 15. supply current vs. temperature (100 lux, tint = 200 ms) temperature ( c) temperature ( c) 80 60 40 20 0 ? 20 ? 40 0 100 200 300 400 500 600 700 80 60 40 20 0 ? 20 ? 40 0 40 80 120 160 200 output counts output counts output counts output counts idd (na) idd ( a) 440 500 560 vdd = 3.6 v vdd = 2.4 v vdd = 3.6 v vdd = 2.4 v vdd = 3.6 v vdd = 2.4 v vdd = 3.6 v vdd = 2.4 v
noa1312 http://onsemi.com 7 typical characteristics figure 16. supply current in power down mode vs. supply voltage (100 lux, tint = 200 ms) figure 17. supply current vs. supply voltage (100 lux, tint = 200 ms) vdd (v) vdd (v) 4.0 3.5 3.0 2.5 2.0 0 20 40 60 80 100 4.0 3.5 3.0 2.5 2.0 0 40 80 120 160 200 figure 18. sda and int fall time (t f ) c l = 250 pf (including all parasitic capacitances) rp = 1 k fall time t f = 36 ns idd (na) idd ( a)
noa1312 http://onsemi.com 8 description of operation ambient light sensor architecture the noa1312 employs a sensitive photo diode fabricated in on semiconductor?s standard cmos process technology. the major components of this sensor are as shown figure 2. the photons which are to be detected pass through the photopic filter limiting extraneous photons and thus performing as a band pass filter on the incident wave front. the filter only transmits photons in the visible spectrum which are primarily detected by the human eye and exhibits excellent ir rejection. the photo response of this sensor is as shown in figure 4. the ambient light signal detected by the photo diode is converted to digital signal using a variable slope integrating adc with a resolution of 16 ? bits, unsigned. the adc value is stored in the als_data register where it can be read by the i 2 c interface. sensor accuracy trim highly accurate ambient light intensity reading can be obtained from the noa1312 by following a simple trimming procedure which stores the trim value in the eeprom memory. this not only enables more accurate readings, but also provides a way to match readings between devices. matching to better than 2% is achievable when devices share a common power supply and thermal environment. the noa1312 uses a type of binary weighted trim code approach which allows the output count to be calibrated to a known light intensity. the factory default code stored in the eeprom is shown in table 8. figure 7 shows the trimming of the output counts when ev = 100 lux. the trimming operation is performed by writing an 8 ? bit code in the range of 0 to 255 (0x00 to 0xff) to the eeprom output_trim register 0x16. changes to the trim register are reflected in real time on the output value of the device. as indicated in table 5, the trimming range is from 315 (when trim code is 0xff) to 825 (when trim code is 0x00). one possible trimming algorithm is to perform a binary search starting with trim code 0x00, refining the search to find a trim code providing 520 counts at ev=100 lux within the desired accuracy. modes of operation the noa1312 can be placed in any of the following modes of operation by programming registers over the i 2 c bus: 1. interrupt driven mode 2. polling mode 3. power ? down mode in the interrupt driven mode, once the noa1312 is configured, no i 2 c activity is necessary until the ambient light intensity goes above the value programmed in the interrupt threshold register (see int_select register 0x03 for details). when this occurs, the device signals an interrupt on the int pin. then it is up to the i 2 c master host to read the als_data count from the device. in polling mode, interrupts are typically disabled, but the noa1312 continuously takes measurements and the i 2 c master host reads out the most recent count whenever it desires to do so, typically in a timed repeat loop. in power ? down mode, the noa1312 stops taking ambient light measurements and powers down most of the internal circuitry and the int pin is deactivated. power is maintained to preserve the register values (static memory) and a portion of the i 2 c remains active to monitor for a power ? on command to the noa1312. i 2 c interface the noa1312 acts as an i 2 c slave device and supports single register read and write operations, in addition to block read and block write operations. all data transactions on the bus are 8 ? bits long. each data byte transmitted is followed by an acknowledge bit. data is transmitted with the msb first. the i 2 c bus address of this device can be 0x29, 0x39 or 0x49, depending on the state of ad pin. when ad is connected to vdd, the address is 0x29. when ad is not connected (floating), the address is 0x39. when ad is connected to vss, the address is 0x49. the ad connection must not be changed after power is applied to the device. figure 19 shows an i 2 c write operation. write transactions begin with the master sending an i 2 c start sequence followed by the seven bit slave address (e.g. 0x29) and the write(0) command bit. the noa1312 will acknowledge this byte transfer with an appropriate ack. next the master will send the 8 ? bit register address to be written to. again the noa1312 will acknowledge reception with an ack. finally, the master will begin sending 8 ? bit data segment (s) to be written to the noa1312 register bank. the noa1312 will send an ack after each byte and increment the address pointer by one in preparation for the next transfer. write transactions are terminated with either an i 2 c stop or with another i 2 c start (repeated start).
noa1312 http://onsemi.com 9 figure 19. i 2 c write command figure 20. i 2 c read command 788 a[6:0] d[7:0] d[7:0] write ack ack ack device address register address register data 010 1001 0 0 0000 0000 0000 0110 0 0 0x52 788 a[6:0] d[7:0] d[7:0] read ack ack nack device address register data [a] register data [a+1] 010 1001 1 0 bbbb bbbb bbbb bbbb 0 1 0x53 788 a[6:0] d[7:0] d[7:0] write ack ack ack device address register address register data start condition 010 1001 0 0 0001 0000 0000 0000 0 0 0x52 stop condition start condition stop condition start condition stop condition figure 20 shows the most basic i 2 c read command sequence sent by the master to the slave device. the sequence consists of a complete i 2 c write command which sets the address pointer in preparation for the i 2 c read command since the read command itself does not include a register address. when reading from a read only data register in the noa1312 it is acceptable to write a 0 to the register in order to update the address pointer, but the 0 does not actually over ? write the value in the data register. once the i 2 c write command is completed, the master sends an i 2 c start sequence followed by the seven bit slave address (e.g. 0x29) and the read(1) command bit. the noa1312 will acknowledge this byte transfer with an appropriate ack. the noa1312 will then begin shifting out data from the register just addressed. if the master wishes to receive more data (next register address), it will ack the slave at the end of the 8 ? bit data transmission, and the slave will respond by sending the next byte, and so on. to signal the end of the read transaction, the master will send a nack bit at the end of a transmission followed by an i 2 c stop. rise and fall time of sda (output) proper operation of the i 2 c bus depends on keeping the bus capacitance low and selecting suitable pull ? up resistor values. figure 18 shows the fall time on sda in output mode under maximum load conditions. the measurement set ? up is shown in figure 21. figure 21. measurement set ? up noa1312 led pulse generator hv adc sda scl int eeprom & charge pump ad i 2 c interface & control
noa1312 http://onsemi.com 10 noa1312 i 2 c slave address the noa1312 i 2 c address is selected by connecting the ad pin as shown in table 6. table 6. i 2 c slave address table ad pin i 2 c slave address vdd 0x29 nc (not connected) 0x39 vss 0x49 the ad pin is not programmable. the connection to ad should be stable before applying power to the device. the device sets the i 2 c slave address when power is applied. for the case where the ad pin is not connected, adding a small 100 pf decoupling capacitor is recommended to provide a stable state. should it be necessary, the address can be changed by following this procedure: 1. disconnect power from the device 2. change the ad connection to the desired level as shown in table 6. 3. reconnect power to the device. once power is applied to this device, any change in the connection to the ad pin may cause unpredictable results. noa1312 data registers noa1312 operation is observed and controlled by internal data registers read from and written to via the external i 2 c interface. registers are listed in table 7. default values are set on initial power up. table 7. noa1312 data registers register address register type value (binary) description eeprom address default (binary) 0x00 power_control rw 0000 0000 power down 0x10 0000 0000 0001 0000 power on 0x01 reset rw 0011 0000 reset als data to 0x0000 0x11 0000 0000 0x02 integration_time rw 1001 0000 400 ms continuous measurement 0x12 1001 0001 1001 0001 200 ms continuous measurement 1010 0000 100 ms continuous measurement 1010 0001 50 ms continuous measurement 1011 0000 20 ms continuous measurement 1011 0001 2 ms continuous measurement 0x03 int_select rw 0000 0001 l h 0x13 0000 0011 0000 0010 h l 0000 0011 inactive (h keeper) 0x04 int_thresh_lsb rw xxxx xxxx interrupt threshold, least significant bits 0x14 0000 0000 0x05 int_thresh_msb rw xxxx xxxx interrupt threshold, most significant bits 0x15 0000 1000 0x06 als_data_lsb r xxxx xxxx als measurement data, least significant bits ? 0000 0000 0x07 als_data_msb r xxxx xxxx als measurement data, most significant bits ? 0000 0000 0x08 device_id_lsb r xxxx xxxx device id value, least significant 0x18 0000 0000 0x09 device _id_msb r xxxx xxxx device id value, most significant bits 0x19 0000 0000 0x0a eeprom_rdwr_ reg_address rw xxxx xxxx address of eeprom register to be read or written to (see table 8) ? 0000 0000 0x0b eeprom _control_ status rw xxxx xxxx eeprom read/write operation control (see table 10) ? 0000 0000 0x10 to 0x19 memory mapped eeprom registers eeprom registers (see table 8)
noa1312 http://onsemi.com 11 power_control register (0x00) the power_control register is used to power the device up and down via software control. by default this device powers up in the power down mode. to reduce power consumption, the noa1312 can be powered down at any time by writing 0x00 to this register. to power up the device, use the following write command sequence: 1. issue start command 2. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 3. issue 0x00 for the power_control register address 4. issue 0x10 to put the device in the power on state 5. issue stop command after applying power to the device or after issuing a power ? on command, stable als_data and int signal may not be available for the first three integration times. for example with a default of 200 ms integration time, the i 2 c master should wait at least 600 ms before accessing this device. to power down the device, use the following write command sequence: 1. issue start command 2. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 3. issue 0x00 for the power_control register address 4. issue 0x00 to put the device in the power down state 5. issue stop command after issuing a power ? down command, the i 2 c master should wait at least 1.5 ms before accessing this device. the data registers are set to the values stored in the eeprom when power is first applied to the device. however the power ? down and power ? on commands do not affect the values of the data registers. reset register (0x01) software reset is controlled by this register. setting this register followed by an i2c_stop sequence will immediately reset the noa1312 to the startup standby state and clear the als_data register. however the values of the other data registers are not affected. to reset the device, use the following write command sequence: 1. issue start command 2. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 3. issue 0x01 for the reset register address 4. issue 0x30 to reset the device 5. issue stop command after issuing a reset command, the device will reset the reset register to 0x00. integration_time register (0x02) the integration_time register controls the integration time of the ambient light sensor which directly affects the sensitivity. to set the integration time, use the following write command sequence: 1. issue start command 2. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 3. issue 0x02 for the integration_time register address 4. issue 0x91 to set the integration time to 200 ms (for example) 5. issue stop command int_select register (0x03) the int_select register controls the polarity of the interrupt pin int and enables or disables interrupts on that pin. to specify low to high transitions on int to signal an interrupt, use the following write command sequence: 1. issue start command 2. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 3. issue 0x03 for the int_select register address 4. issue 0x01 to specify low to high signaling on int 5. issue stop command to specify high to low transitions on int to signal an interrupt, use the following write command sequence: 1. issue start command 2. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 3. issue 0x03 for the int_select register address 4. issue 0x02 to specify high to low signaling on int 5. issue stop command disabling interrupts causes the int pin to be held in the open ? drain or high state. to disable interrupts on the int pin, use the following write command sequence: 1. issue start command 2. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 3. issue 0x03 for the int_select register address 4. issue 0x03 to disable interrupts on int 5. issue stop command int_thresh_lsb and int_thres_msb registers (0x04, 0x05) the int_thresh register specifies an ambient light threshold value for signaling interrupts on the int pin. the int_thresh register is 16 ? bits wide to match the 16 ? bit als_data register and is accessed over the i 2 c bus as two 8 ? bit registers for the least and most significant bits (lsb and msb). on any measurement cycle where the
noa1312 http://onsemi.com 12 als_data intensity count exceeds the int_thresh value, the int pin will become active and will remain active until a measurement cycle where the count is less than or equal to the threshold (and provided the int pin is enabled, see int_select register). changing the int_thresh register value can cause the int pin to change immediately if the als_data to int_thresh comparison changes. powering down the device will cause the int pin to become inactive. to program a value into the int_thresh register, use the following write command sequence: 1. issue start command 2. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 3. issue 0x04 for the int_thres_lsb register address 4. issue the 8 ? bit lsb value 5. issue stop command 6. issue start command 7. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 8. issue 0x05 for the int_thres_msb register address 9. issue the 8 ? bit msb value 10. issue stop command als_data_lsb and als_data_msb registers (0x06, 0x07) the als_data register holds the ambient light intensity count from the most recent measurement. the als_data register is 16 ? bits wide and is accessed from the i 2 c bus as two 8 ? bit registers for the least and most significant bits (lsb and msb). to read the als_data register, use the following read command sequence: 1. issue start command 2. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 3. issue 0x06 for the int_data_lsb register address 4. issue start command 5. issue 0x53 (lower seven bits of i 2 c slave address 0x29 followed by read ? bit 1) ? the read address could be 0x53 (0x29), 0x73 (0x39) or 0x93 (0x49) 6. read the als_data_lsb byte 7. read the als_data_msb byte 8. issue stop command after a power ? down and power ? on sequence, wait at least three integration times for the data to stabilize, before accessing any als_data values from noa1312. device_id_lsb and device_id_msb registers (0x08, 0x09) the device_id registers hold the id number for this device. this id number could be changed at any time by writing appropriate id number to the eeprom registers 0x18 and 0x19. the device_id register is 16 ? bits wide and is accessed from the i 2 c bus as two 8 ? bit registers for the least and most significant bits (lsb and msb). to read the device_id register, use the following read command sequence: 1. issue start command 2. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 3. issue 0x08 for the device_id_lsb register address 4. issue start command 5. issue 0x53 (lower seven bits of i 2 c slave address 0x29 followed by read ? bit 1) ? the read address could be 0x53 (0x29), 0x73 (0x39) or 0x93 (0x49) 6. read the device_id_lsb byte 7. read the device_id_msb byte 8. issue stop command noa1312 eeprom registers the eeprom registers are listed in table 8. the defaults values are set at the factory and will retain their values until modified by the user. they retain their values even when the device is not powered. table 8. eeprom registers eeprom address register type factory default value (binary) 0x10 power_control rw 0000 0000 0x11 reset_als_data rw 0000 0000 0x12 integration_time rw 1001 0001 0x13 int_select rw 0000 0011 0x14 int_thresh_lsb rw 0000 0000 0x15 int_thresh_msb rw 0000 1000 0x16 output_trim rw 0101 1101 0x17 for future use rw xxxx xxxx 0x18 device_id_lsb rw 0000 0000 0x19 device_id_msb rw 0000 0000 eeprom_rdwr_reg_address register (0x0a) the eeprom_rdwr_reg_address register specifies the address of an eeprom register to be read or written to and is used in conjunction with the eeprom_control_stataus register (0x0b) to ef fect read and write operations with the eeprom.
noa1312 http://onsemi.com 13 the eeprom enables the noa1312 to retain register values even when fully powered down, facilitating a quick and simple power on sequence. table 8 shows the eeprom registers and their values as shipped from the factory . during power up, the values in the eeprom registers are automatically transferred to the i 2 c registers as specified in table 9. eeprom register values are not automatically updated during power down and must be explicitly updated with a write operation as described below. eeprom register address 0x16 contains an 8 ? bit output_trim value. writing to the output_trim register will change the output count value in real time. eeprom register address 0x17 is reserved for future use. table 9. noa1312 data registers stored in eeprom i 2 c register address eeprom register address register name 0x00 0x10 power_control 0x01 0x11 reset_als_data 0x02 0x12 integration_time 0x03 0x13 int_select 0x04 0x14 int_thresh_lsb 0x05 0x15 int_thresh_msb none 0x16 output_trim none 0x17 for future use 0x08 0x18 device_id_lsb 0x09 0x19 device_id_msb table 10. eeprom_control_status register bits bit description 0 write to eeprom ? when this bit is set to ?1?, the register whose address is written in the eeprom_rdwr_reg_address register (located at address 0x0a) is written to the eeprom. the data to be written to eeprom should be written to registers 0x10 ? 0x19 before writing a ?1? to this bit . 1 eeprom write complete flag ? after bit[0] of this register is written with a value of ?1?, the eeprom write operation is starte d. after the eeprom write operation is complete, bit[1] is set to ?1? and bit[0] is cleared to ?0?. 2 read from eeprom ? when this bit is set to ?1?, the register whose address is written in the eeprom_rdwr_reg_ad- dress register (located at address 0x0a) is read from eeprom. the data read from eeprom is placed in the appropriate register 0x10 ? 0x19. 3 eeprom read complete flag ? after bit[2] of this register is written with a value of ?1?, the eeprom read operation is started. after the eeprom read operation is complete, bit[3] is set to ?1? and bit[2] is cleared to ?0?. 4 ? 7 reserved eeprom_control_status register (0x0b) the eeprom_control_status register is used to effect reads and writes to the eeprom register specified in eeprom_rdwr_reg_address. individual control and status register bits are used to initiate reads and writes and to indicate when the operation is complete. table 10 shows the register bits and their values. for example, to write the device_id_lsb value to the eeprom, write the device_id_lsb to register 0x18. read back register 0x18 to verify the write and then transfer the data to the eeprom with the following write command sequence: 1. issue start command 2. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 3. issue 0x0a for the eeprom_rdwr_reg_address register address 4. issue 0x18 for the eeprom device_id_lsb register address to be read 5. issue stop command 6. issue start command 7. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 8. issue 0x0b for the eeprom_control_status register address 9. issue 0x01 value to initiate an eeprom write operation 10. issue stop command. 11. wait 15 ms for the eeprom write operation to complete 12. issue start command 13. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 14. issue 0x0b for the eeprom_control_status register address 15. issue start command 16. issue 0x53 (lower seven bits of i 2 c slave address 0x29 followed by read ? bit 1) ? the read address could be 0x53 (0x29), 0x73 (0x39) or 0x93 (0x49) 17. read the eeprom_control_status byte 18. issue stop command 19. if the eeprom_control_status byte equals 0x02 the write is complete, otherwise go to step 12.
noa1312 http://onsemi.com 14 to write the device_id_msb value to the eeprom, the above sequence must be repeated substituting the msb register address values. to read the device_id_lsb value from the eeprom, use the following read command sequence: 1. issue start command 2. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 3. issue 0x0a for the eeprom_rdwr_reg_address register address 4. issue 0x18 for the eeprom device_id_lsb register address to be read 5. issue stop command 6. issue start command 7. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 8. issue 0x0b for the eeprom_control_status register address 9. issue 0x04 value to initiate an eeprom read operation 10. issue stop command. 11. wait 3 ms for the eeprom read operation to complete 12. issue start command 13. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 14. issue 0x0b for the eeprom_control_status register address 15. issue start command 16. issue 0x53 (lower seven bits of i 2 c slave address 0x29 followed by read ? bit 1) ? the read address could be 0x53 (0x29), 0x73 (0x39) or 0x93 (0x49) 17. read the eeprom_control_status byte 18. issue stop command 19. if the eeprom_control_status byte equals 0x08 proceed to the next step, otherwise go to step 12. 20. issue start command 21. issue 0x52 (lower seven bits of i 2 c slave address 0x29 followed by write ? bit 0) ? the write address could be 0x52 (0x29), 0x72 (0x39) or 0x92 (0x49) 22. issue 0x18 for the eeprom device_id_lsb register address 23. issue start command 24. issue 0x53 (lower seven bits of i 2 c slave address 0x29 followed by read ? bit 1) ? the read address could be 0x53 (0x29), 0x73 (0x39) or 0x93 (0x49) 25. read the device_id_lsb byte 26. issue stop command to read the device_id_msb value from the eeprom, the above sequence must be repeated substituting the msb register address values. output_trim register (0x16) eeprom register address 0x16 contains 8 ? bits of output trim covering the range of 0x00 to 0xff (0 to 255). table 11 shows the minimum, default and maximum trim available. table 11. output_trim register values input code trim gain 0000 0000 165% 0101 1101 100% 1111 1111 63% changes to the trim register are reflected in real time on the output value of the device.
noa1312 http://onsemi.com 15 example programming sequence the following pseudo code configures the noa1312 ambient light sensor and then runs it in an interrupt driven mode. when the controller receives an interrupt, it reads the als_data from the device, sets a flag and then waits for the main polling lo op to respond to the ambient light change. external subroutine i2c_read_byte (i2c_address, data_address); external subroutine i2c_read_block (i2c_address, data_start_address, count, memory_map); external subroutine i2c_write_byte (i2c_address, data_address, data); external subroutine i2c_write_block (i2c_address, data_start_address, count, memory_map); subroutine initialize_als () { membuf[0x00] = 0x10; // power_control assert power on membuf[0x01] = 0x30; // reset assert reset membuf[0x02] = 0x91; // integration_time select 200ms membuf[0x03] = 0x01; // int_select select low to high membuf[0x04] = 0xff; // int_thresh_lsb membuf[0x05] = 0x8f; // int_thresh_msb i2c_write_block (i2caddr, 0x00, 6, membuf); } subroutine i2c_interupt_handler () { // retrieve and store the als data als_data_lsb = i2c_read_byte (i2caddr, 0x06); als_data_msb = i2c_read_byte (i2caddr, 0x07); newals = 0x01; } subroutine main_loop () { i2caddr = 0x29; newals = 0x00; initialize_als (); loop { // do some other polling operations if (newals == 0x01) { newals = 0x00; // do some operations with als_data } } }
noa1312 http://onsemi.com 16 package dimensions notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30mm from the terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. seating plane d e 0.10 c a3 2x 2x 0.10 c cudfn6, 2x2 case 505ad ? 01 issue b dim max millimeters pin one reference 0.05 c 0.05 c 7x a 0.10 c note 3 l e d2 e2 b b 3 6 6x 1 k 4 6x 0.05 c bottom view mounting footprint dimensions: millimeters *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. a b top view a a1 detail a c side view note 4 detail a end view d a a1 b e2 d d e k e l a3 min 0.55 0.00 0.18 0.80 --- 0.20 0.25 4 0.65 0.05 0.28 1.00 0.10 --- 0.35 0.20 ref 10 2.00 bsc 2.00 bsc 0.65 bsc 6x 0.52 0.65 pitch 1.70 2.30 6x 0.28 1.00 1 d2 1.50 1.70 a 0.10 cb a 0.10 cb on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 noa1312/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca l sales representative

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